HC4GX15 Datasheet, PDF (219/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 3: Mapping Stratix IV Device Resources to HardCopy IV Devices
3–17
Designing with HardCopy IV I/Os
As with Stratix IV devices, HardCopy IV devices allow a memory interface to be
located on any side of the device. The only limitation is if the left and right sides have
to be reserved for high-speed I/O applications, as described in the following section.
Table 3–11 and Table 3–12 show the number of DQ and DQS buses supported per
companion device pair.
Table 3–11. Number of DQS/DQ Groups in HardCopy IV GX Devices per Side (Note 1)
HardCopy IV GX
ASIC
Package
Side
x4 (2)
x8/x9
x16/x18 x32/x36
Left
14
6
2
0
HC4GX15LA
780-pin
FineLine BGA
Bottom
Right
17
0
8
0
2
0
0
0
Top
17
8
2
0
Left
0
0
0
0
HC4GX15L
780-pin
FineLine BGA
Bottom
Right
17
0
8
0
2
0
0
0
Top
17
8
2
0
Left
13
6
2
0
HC4GX25
1152-pin
FineLine BGA
Bottom
Right
26
13
12
6
4
2
0
0
Top
26
12
4
0
Left
13
6
2
0
HC4GX35
1152-pin
FineLine BGA
Bottom
Right
26
13
12
6
4
2
0
0
Top
26
12
4
0
Left
26
12
4
0
HC4GX35
1517-pin
FineLine BGA
Bottom
Right
26
26
12
12
4
4
0
0
Top
26
12
4
0
Notes to Table 3–11:
(1) These numbers are preliminary.
(2) Some of the DQS and DQ pins can also be used as R_UP/R_DN pins. You lose one DQS/DQ group if you use these pins
as R_UP/R_DN pins for OCT calibration. Make sure that the DQS/DQ groups that you have chosen are not also used
for OCT calibration.
Table 3–12. Number of DQS/DQ Groups in HardCopy IV E Devices per Side (Note 1) (Part 1 of 2)
HardCopy IV E
ASIC
Package
Side
x4 (2)
x8/x9
x16/x18 x32/x36
Left
12
4
0
0
HC4E25
484-pin
FineLine BGA
Bottom
Right
5
12
2
4
0
0
0
0
Top
5
2
0
0
© January 2010 Altera Corporation
HardCopy IV Device Handbook, Volume 2