HC4GX15 Datasheet, PDF (226/668 Pages) Altera Corporation – HardCopy IV Device Handbook

3–24
Chapter 3: Mapping Stratix IV Device Resources to HardCopy IV Devices
Designing with HardCopy IV I/Os
Table 3–15. LVDS Channels Supported In HardCopy IV E and Stratix IV E Companion Devices with
Non-Socket Replacement Flow (Note 1), (2), (3) (Part 2 of 2)
484-Pin FineLine BGA
780-Pin FineLine BGA
HardCopy IV E ASIC
Stratix IV E FPGA Prototype
Bank
HC4E25
EP4SE230
4B (3)
—
—
4C (3)
6Rx + 6eTx
or
12eTx
6Rx + 6eTx
or
12eTx
5A
6Rx + 6Tx
8Rx + 8Tx
5B
—
—
5C
6Rx + 6Tx
6Rx + 6Tx
6A
6Rx + 6Tx
8Rx + 8Tx
6B
—
—
6C
6Rx + 6Tx
6Rx + 6Tx
7A (3)
—
10Rx + 10eTx
or
20eTx
7B (3)
—
—
7C (3)
6Rx + 6eTx
or
12eTx
6Rx + 6eTx
or
12eTx
8A (3)
—
10Rx + 10eTx
or
20eTx
8B (3)
—
—
8C (3)
6Rx + 6eTx
or
12eTx
6Rx + 6eTx
or
12eTx
Notes to Table 3–15:
(1) Channel counts are preliminary.
(2) Rx = true LVDS input buffers with OCT RD, Tx = true LVDS output buffers, and eTx = emulated LVDS output buffers
(either LVDS_E_1R or LVDS_E_3R).
(3) Top and bottom I/O banks do not have DPA, synchronizer, data realignment, and differential termination support
in Stratix IV E and HardCopy IV E devices. Use left and right I/O banks if these features and maximum performance
is required.
HardCopy IV Device Handbook, Volume 2
© January 2010 Altera Corporation