HC4GX15 Datasheet, PDF (38/668 Pages) Altera Corporation – HardCopy IV Device Handbook

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Chapter 4: TriMatrix Embedded Memory Blocks in HardCopy IV Devices
Design Considerations
f For more information about embedded memory support in Stratix IV devices, refer to
the TriMatrix Embedded Memory Blocks in Stratix IV Devices chapter in volume 1 of the
Stratix IV Device Handbook.
MLAB Implementation
While the M9K and M144K memory blocks are dedicated resources that function the
same in Stratix IV and HardCopy IV devices, the MLABs are implemented differently
in the two device families. In Stratix IV devices, the MLABs are dedicated blocks that
you can configure for regular logic functions or memory functions. In HardCopy IV
devices, the MLAB memory blocks are implemented using HCells. HCells are a
collection of logic transistors connected together to form HCell macros (HCMs). The
Quartus II software maps the Stratix IV MLAB function to the appropriate memory
HCell macro that preserves the memory function. This allows the HardCopy IV core
fabric to be used more efficiently, freeing up unused HCells for adaptive logic module
(ALM) or digital signal processing (DSP) functions.
f For more information about HCells in HardCopy IV devices, refer to the Logic Array
Block and Adaptive Logic Module Implementation in HardCopy IV Devices chapter.
Design Considerations
Unlike Stratix IV devices, HardCopy IV devices do not have device configuration, so
memories that are configured as RAM power up with random content. Therefore, the
memory block contents cannot be pre-loaded or initialized with a memory
initialization file (.mif) in HardCopy IV devices. You must ensure that your Stratix IV
design does not require .mifs if you use the memory blocks as RAM. However, if you
use the memory blocks as ROM, they are mask programmed to the design’s ROM
contents.
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You can use the ALTMEM_INIT megafunction to initialize the RAM after power up
for HardCopy IV devices. This megafunction reads from an internal ROM (inside the
megafunction) or an external ROM (on chip or off chip) and writes to the RAM after
power up.
When using non-registered output mode for the HardCopy IV MLAB memory blocks,
the outputs power up with memory content. When using registered output mode for
these memory blocks, the outputs are cleared on power up. You must take this into
consideration when designing logic that might evaluate the initial power up values of
the MLAB memory block.
HardCopy IV Device Handbook, Volume 1
© January 2010 Altera Corporation