HC4GX15 Datasheet, PDF (357/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 1: HardCopy IV GX Transceiver Architecture
1–93
Receiver Channel Datapath
The deskew operation in XAUI functional mode is compliant to the PCS deskew state
machine diagram specified in clause 48 of IEEE P802.3ae, as shown in Figure 1–70.
Figure 1–70. Deskew FIFO Operation in XAUI Functional Mode (Note 1)
SUDI(![/||A||/])
reset +
(sync_status=FAIL * SUDI)
LOSS_OF_ALIGNMENT
align_status ⇐ FAIL
enable_deskew ⇐TRUE
AUDI
sync_status OK * SUDI(![/||A||/])
deskew_error * SUDI
ALIGN_DETECT_1
enable_deskew ⇐ FALSE
AUDI
SUDI(![/||A||/])
!deskew_error
* SUDI(![/||A||/])
deskew_error * SUDI
ALIGN_DETECT_2
AUDI
SUDI(![/||A||/])
!deskew_error
* SUDI(![/||A||/])
deskew_error * SUDI
ALIGN_DETECT_3
AUDI
1
SUDI(![/||A||/])
deskew_error * SUDI
ALIGN_ACQUIRED_1
enable_deskew ⇐ FALSE
AUDI
2
SUDI(![/||A||/])
!deskew_error
* SUDI(![/||A||/])
!deskew_error
* SUDI(![/||A||/])
Note to Figure 1–70:
(1) This figure is from IEEE P802.3ae.
deskew_error * SUDI
deskew_error * SUDI
deskew_error * SUDI
ALIGN_ACQUIRED_2
AUDI
!deskew_error
* SUDI(![/||A||/])
3
SUDI(![/||A||/])
1
ALIGN_ACQUIRED_3
AUDI
!deskew_error
* SUDI(![/||A||/])
SUDI(![/||A||/])
2
ALIGN_ACQUIRED_4
AUDI
!deskew_error
* SUDI(![/||A||/])
SUDI(![/||A||/])
3
Rate Match (Clock Rate Compensation) FIFO
In asynchronous systems, the upstream transmitter and local receiver can be clocked
with independent reference clocks. Frequency differences in the order of a few
hundred PPM can corrupt the data when latching from the recovered clock domain
(the same clock domain as the upstream transmitter reference clock) to the local
receiver reference clock domain.
The rate match FIFO compensates for small clock frequency differences between the
upstream transmitter and the local receiver clocks by inserting or removing SKP
symbols or ordered sets from the IPG or idle streams. It deletes SKP symbols or
ordered sets when the upstream transmitter reference clock frequency is higher than
the local receiver reference clock frequency. It inserts SKP symbols or ordered-sets
when the local receiver reference clock frequency is higher than the upstream
transmitter reference clock frequency.
© June 2009 Altera Corporation
HardCopy IV Device Handbook Volume 3