HC4GX15 Datasheet, PDF (428/668 Pages) Altera Corporation – HardCopy IV Device Handbook

1–164
Chapter 1: HardCopy IV GX Transceiver Architecture
Functional Modes
GIGE Mode Datapath
Figure 1–132 shows the transceiver datapath when configured in GIGE functional
mode.
Figure 1–132. GIGE Mode Datapath
Core
Fabric
tx_coreclk[0]
TX Phase
Compensation
FIFO
wrclk rdclk
tx_clkout[0]
Core
Fabric-Transceiver
Interface Clock
RX Phase
Compensation
FIFO
8B/10B
Decoder
Transmitter Channel PCS
8B/10B
Encoder
Low-Speed Parallel Clock
Transmitter Channel PMA
Serializer
High-Speed Serial Clock
Local
Clock Divider
Receiver Channel PCS
Rate
Match
FIFO
Word
Aligner
Receiver Channel PMA
De-
CDR
Serializer
rx_coreclk[0]
Parallel Recovered Clock
Low-Speed Parallel Clock
Table 1–45 shows the transceiver datapath clock frequencies in GIGE functional mode.
Table 1–45. Transceiver Datapath Clock Frequencies in GIGE Mode
Functional Mode
GIGE
Data Rate
1.25 Gbps
High-Speed Serial
Clock Frequency
625 MHz
Parallel Recovered
Clock and
Low-Speed
Parallel Clock
Frequency
125 MHz
Core Fabric-Transceiver
Interface Clock Frequency
125 MHz
8B/10B Encoder
In GIGE mode, the 8B/10B encoder clocks in 8-bit data and 1-bit control identifiers
from the transmitter phase compensation FIFO and generates 10-bit encoded data.
The 10-bit encoded data is fed to the serializer. For more information about 8B/10B
encoder functionality, refer to “8B/10B Encoder” on page 1–40.
GIGE Protocol—Ordered Sets and Special Code Groups
Table 1–46 lists ordered sets and special code groups specified in the IEEE 802.3
specification.
Table 1–46. GIGE Ordered Sets (Part 1 of 2)
Code
/C/
/C1/
/C2/
/I/
Ordered Set
Configuration
Configuration 1
Configuration 2
IDLE
Number of Code
Groups
—
4
4
—
Encoding
Alternating /C1/ and /C2/
/K28.5/D21.5/Config_Reg (1)
/K28.5/D2.2/Config_Reg (1)
Correcting /I1/, Preserving /I2/
HardCopy IV Device Handbook Volume 3
© June 2009 Altera Corporation