HC4GX15 Datasheet, PDF (64/668 Pages) Altera Corporation – HardCopy IV Device Handbook

6–14
Chapter 6: HardCopy IV Device I/O Features
Design Considerations
I/O Banks Restrictions
Each I/O bank can simultaneously support multiple I/O standards. The following
sections provide guidelines for mixing non-voltage-referenced and
voltage-referenced I/O standards in HardCopy IV devices.
Non-Voltage-Referenced Standards
Each HardCopy IV I/O bank has its own VCCIO pins and can be powered by only one
V_CCIO voltage supply level, either 1.2-, 1.5-, 1.8-, 2.5-, or 3.0-V. An I/O bank can
simultaneously support any number of input signals with different I/O standard
assignments, as shown in Table 6–5. For example, an I/O bank with a 2.5-V V_CCIO
setting can support 2.5-V standard inputs and outputs and 3.0-V LVCMOS inputs (not
output or bidirectional pins).
For output signals, a single I/O bank supports non-voltage-referenced output signals
that are driving at the same voltage as V_CCIO. Because an I/O bank can only have one
V_CCIO value, it can only drive out that one value for non-voltage-referenced signals.
Voltage-Referenced Standards
To accommodate voltage-referenced I/O standards, each HardCopy IV device's I/O
bank, such as 1A and 1C, supports separate VREF pins feeding its individual VREF
bus. You cannot use the VREF pins as generic I/O pins. Thus, if an I/O bank does not
use any voltage-referenced I/O standards, the VREF pin for that I/O bank must be
tied to V_CCIO or GND. Each bank can only have a single V_CCIO voltage level and a single
V_REF voltage level at a given time.
An I/O bank featuring single-ended or differential standards can support
voltage-referenced standards as long as all voltage-referenced standards use the same
V_REF setting.
For performance reasons, voltage-referenced input standards use their own V_CCPD
level as the power source. This feature allows you to place voltage-referenced input
signals in an I/O bank with a V_CCIO of 2.5 or below. For example, you can place
HSTL-15 input pins in an I/O bank with a 2.5-V V_CCIO.
Voltage-referenced bidirectional and output signals must be the same as the I/O
bank’s V_CCIO voltage. For example, you can only place SSTL-2 output pins in an I/O
bank with a 2.5-V V_CCIO.
Mixing Voltage-Referenced and Non-Voltage-Referenced Standards
An I/O bank can support both non-voltage-referenced and voltage-referenced pins by
applying each of the rule sets individually. For example, an I/O bank can support
SSTL-18 inputs and 1.8-V inputs and outputs with a 1.8-V V_CCIO and a 0.9-V V_REF.
Similarly, an I/O bank can support 1.5-V standards, 1.8-V inputs (but not outputs),
and HSTL and HSTL-15 I/O standards with a 1.5-V V_CCIO and 0.75-V V_REF.
Non-Socket Replacement of the FPGA with HardCopy
HardCopy IV E devices offer non-socket replacement of the FPGA devices.
Non-socket replacement of the FPGA with a HardCopy device requires a board
redesign. Table 6–6 lists the non-socket replacement options.
HardCopy IV Device Handbook, Volume 1
© January 2010 Altera Corporation