HC4GX15 Datasheet, PDF (325/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 1: HardCopy IV GX Transceiver Architecture
Receiver Channel Datapath
Figure 1–48. AC-Coupled Link
Transmitter
TX Termination
AC Coupling
Capacitor
Physical Medium
Receiver
Physical Medium
AC Coupling
Capacitor
RX Termination
1–61
TX
RX
V_CM
V_CM
Note to Figure 1–48:
(1) The receiver termination and biasing can be on-chip or off-chip.
The following protocols supported by HardCopy IV GX devices mandate
AC-coupled links:
■ PCI Express (PIPE)
■ Gigabit Ethernet
■ Serial RapidIO
■ XAUI
■ SDI
DC-Coupled Links
In a DC-coupled link, the transmitter DC common mode voltage is seen unblocked at
the receiver buffer. Link common mode voltage depends on the transmitter common
mode voltage and the receiver common mode voltage. The on-chip or off-chip
receiver termination and biasing circuitry must ensure compatibility between the
transmitter and the receiver common mode voltage. Figure 1–49 shows a DC-coupled
link.
© June 2009 Altera Corporation
HardCopy IV Device Handbook Volume 3