HC4GX15 Datasheet, PDF (111/668 Pages) Altera Corporation – HardCopy IV Device Handbook

8. High-Speed Differential I/O Interfaces
and DPA in HardCopy IV Devices
HIV51008-2.1
The HardCopy^® IV device family offers up to 1.25-Gbps differential I/O capabilities to
support source-synchronous communication protocols such as Utopia, RapidIO^®,
XSBI, SGMII, SFI, and SPI. HardCopy IV and Stratix^® IV devices have identical
circuitry for high-speed differential I/O interfaces and dynamic phase alignment
(DPA). HardCopy IV high-speed I/Os support the same I/O standards and
implementation guidelines as Stratix IV devices. You can prototype high-speed
interfaces with Stratix IV devices and map the design to HardCopy IV devices.
1 Because of differences in resource availability, you must set the HardCopy IV
companion device option in the Quartus^® II software to map your Stratix IV project to
a HardCopy IV device.
HardCopy IV devices have the same dedicated circuitry as Stratix IV devices for
high-speed differential I/O support:
■ Differential I/O buffer
■ Transmitter serializer
■ Receiver deserializer
■ Data realignment
■ DPA
■ Synchronizer (FIFO buffer)
■ Analog phase-locked looks (PLLs) located on the left and right sides of the device
For high-speed differential interfaces, HardCopy IV devices support the following
differential I/O standards:
■ Low voltage differential signaling (LVDS)
■ Mini-LVDS
■ Reduced swing differential signaling (RSDS)
■ Differential HSTL
■ Differential SSTL
You can use HSTL and SSTL I/O standards only for PLL clock inputs and outputs in
differential mode.
I/O Banks
HardCopy IV E I/Os are divided into 16 to 20 I/O banks. The dedicated circuitry that
supports high-speed differential I/Os is located in the left and right (row) I/O banks
of the device. Figure 8–1 shows the different banks and the I/O standards supported
by the banks.
© January 2010 Altera Corporation
HardCopy IV Device Handbook, Volume 1