HC4GX15 Datasheet, PDF (276/668 Pages) Altera Corporation – HardCopy IV Device Handbook

1–12
Chapter 1: HardCopy IV GX Transceiver Architecture
Transceiver Port List
Table 1–2. HardCopy IV GX ALTGX Megafunction Ports (Part 5 of 14)
Port Name
Input/Output
Description
Deskew FIFO
rx_channelaligned
Output
Ten-gigabit attachment unit interface (XAUI)
deskew FIFO channel aligned indicator.
Available only in XAUI mode. A high level
indicates that the XAUI deskew state machine is
either in ALIGN_ACQUIRED_1,
ALIGN_ACQUIRED_2,
ALIGN_ACQUIRED_3, or
ALIGN_ACQUIRED_4 state, as specified in
the PCS deskew state diagram in the IEEE
P802.3ae specification.
A low level indicates that the XAUI deskew state
machine is either in LOSS_OF_ALIGNMENT,
ALIGN_DETECT_1, ALIGN_DETECT_2, or
ALIGN_DETECT_3 state, as specified in the
PCS deskew state diagram in the IEEE P802.3ae
specification.
Rate Match (Clock Rate Compensation) FIFO
rx_rmfifodatainserted
Output
rx_rmfifodatadeleted
Output
rx_rmfifofull
Output
rx_rmfifoempty
Output
Rate match FIFO insertion status indicator. A
high level indicates that the rate match pattern
byte has inserted to compensate for the
parts-per-million (PPM) difference in reference
clock frequencies between the upstream
transmitter and the local receiver.
Rate match FIFO deletion status indicator. A
high level indicates that the rate match pattern
byte got deleted to compensate for the PPM
difference in reference clock frequencies
between the upstream transmitter and the local
receiver.
Rate match FIFO full status indicator. A high
level indicates that the rate match FIFO is full.
Driven for a minimum of two recovered clock
cycles in configurations without byte serializer
and a minimum of three recovered clock cycles
in configurations with byte serializer.
Rate match FIFO empty status indicator. A high
level indicates that the rate match FIFO is
empty.
Driven for a minimum of two recovered clock
cycles in configurations without byte serializer
and a minimum of three recovered clock cycles
in configurations with byte serializer.
Scope
Transceiver
block
Channel
Channel
Channel
Channel
HardCopy IV Device Handbook Volume 3
© June 2009 Altera Corporation