HD64F2149 Datasheet, PDF (971/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

TCSRX—Timer Control/Status Register X
H'FFF1
TMRX
TCSRX
Bit
Initial value
Read/Write
7
CMFB
0
R/(W)*
6
CMFA
0
R/(W)*
5
OVF
0
R/(W)*
4
ICF
0
R/(W)*
3
OS3
0
R/W
2
OS2
0
R/W
1
OS1
0
R/W
0
OS0
0
R/W
Output select 1 and 0
0 0 No change at compare match A
1 0 output at compare match A
1 0 1 output at compare match A
1 Output inverted at compare
match A (toggle output)
Output select 3 and 2
0 0 No change at compare match B
1 0 output at compare match B
1 0 1 output at compare match B
1 Output inverted at compare
match B (toggle output)
Input capture flag
0 [Clearing condition]
When 0 is written in ICF after reading ICF = 1
1 [Setting condition]
When a rising edge followed by a falling edge is
detected in the external reset signal after the
ICST bit in TCONRI has been set to 1
Timer overflow flag
0 [Clearing condition]
When 0 is written in OVF after reading OVF = 1
1 [Setting condition]
When TCNT overflows from H'FF to H'00
Compare match flag A
0 [Clearing conditions]
• When 0 is written in CMFA after reading CMFA = 1
• When the DTC is activated by a CMIA interrupt
1 [Setting condition]
When TCNT = TCORA
Compare match flag B
0 [Clearing conditions]
• When 0 is written in CMFB after reading CMFB = 1
• When the DTC is activated by a CMIB interrupt
1 [Setting condition]
When TCNT = TCORB
Note: * Only 0 can be written in bits 7 to 4, to clear the flags.
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