HD64F2149 Datasheet, PDF (483/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Table 15.11 Receive Errors and Conditions for Occurrence
Receive Error
Overrun error
Framing error
Parity error
Abbreviation
ORER
FER
PER
Occurrence Condition
Data Transfer
When the next data reception is Receive data is not
completed while the RDRF flag transferred from RSR to
in SSR is set to 1
RDR
When the stop bit is 0
Receive data is transferred
from RSR to RDR
When the received data differs Receive data is transferred
from the parity (even or odd) set from RSR to RDR
in SMR
Figure 15.8 shows an example of the operation for reception in asynchronous mode.
Start
1 bit
Data
Parity Stop Start
bit bit bit
Data
Parity Stop
bit bit
1
0 D0 D1
D7 0/1 1 0 D0 D1
D7 0/1
0 ^{Idle state}
(mark state)
RDRF
FER
RXI interrupt
request
generated
RDR data read and RDRF
flag cleared to 0 in RXI
interrupt handling routine
ERI interrupt request
generated by framing
error
1 frame
Figure 15.8 Example of SCI Operation in Reception
(Example with 8-Bit Data, Parity, One Stop Bit)
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