HD64F2149 Datasheet, PDF (369/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

12.2.3 Time Constant Register B (TCORB)
TCORB0
TCORB1
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
TCORBX, TCORBY
Bit
7
6
5
4
3
2
1
0
Initial value
1
Read/Write R/W
1
1
R/W R/W
1
1
1
R/W R/W R/W
1
1
R/W R/W
TCORB is an 8-bit readable/writable register. TCORB0 and TCORB1 comprise a single 16-bit
register, so they can be accessed together by word access.
TCORB is continually compared with the value in TCNT. When a match is detected, the
corresponding compare-match flag B (CMFB) in TCSR is set. Note, however, that comparison is
disabled during the T2 state of a TCORB write cycle.
The timer output can be freely controlled by these compare-match signals and the settings of
output select bits OS3 and OS2 in TCSR.
TCORB is initialized to H'FF by a reset and in hardware standby mode.
12.2.4 Timer Control Register (TCR)
Bit
Initial value
Read/Write
7
CMIEB
0
R/W
6
CMIEA
0
R/W
5
OVIE
0
R/W
4
3
CCLR1 CCLR0
0
0
R/W R/W
2
CKS2
0
R/W
1
CKS1
0
R/W
0
CKS0
0
R/W
TCR is an 8-bit readable/writable register that selects the clock source and the time at which
TCNT is cleared, and enables interrupts.
TCR is initialized to H'00 by a reset and in hardware standby mode.
For details of the timing, see section 12.3, Operation.
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