HD64F2149 Datasheet, PDF (137/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

5.2.3 IRQ Enable Register (IER)
Bit
Initial value
Read/Write
7
IRQ7E
0
R/W
6
IRQ6E
0
R/W
5
IRQ5E
0
R/W
4
IRQ4E
0
R/W
3
IRQ3E
0
R/W
2
IRQ2E
0
R/W
1
IRQ1E
0
R/W
0
IRQ0E
0
R/W
IER is an 8-bit readable/writable register that controls enabling and disabling of interrupt requests
IRQ7 to IRQ0.
IER is initialized to H'00 by a reset and in hardware standby mode.
Bits 7 to 0—IRQ7 to IRQ0 Enable (IRQ7E to IRQ0E): These bits select whether IRQ7 to
IRQ0 are enabled or disabled.
Bit n
IRQnE
0
1
Description
IRQn interrupt disabled
IRQn interrupt enabled
(Initial value)
(n = 7 to 0)
5.2.4 IRQ Sense Control Registers H and L (ISCRH, ISCRL)
• ISCRH
Bit
Initial value
Read/Write
15
14
13
12
11
10
9
8
IRQ7SCB IRQ7SCA IRQ6SCB IRQ6SCA IRQ5SCB IRQ5SCA IRQ4SCB IRQ4SCA
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
• ISCRL
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
IRQ3SCB IRQ3SCA IRQ2SCB IRQ2SCA IRQ1SCB IRQ1SCA IRQ0SCB IRQ0SCA
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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