HD64F2149 Datasheet, PDF (355/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

11.3.9 ICRD and OCRDM Mask Signal Generation
When the ICRDMS bit in TOCR is set to 1 and the contents of OCRDM are other than H'0000, a
signal that masks the ICRD input capture function is generated.
The mask signal is set by the input capture signal. The mask signal setting timing is shown in
figure 11.15.
The mask signal is cleared by the sum of the ICRD contents and twice the OCRDM contents, and
an FRC compare-match. The mask signal clearing timing is shown in figure 11.16.
ø
Input capture
signal
Input capture
mask signal
Figure 11.15 Input Capture Mask Signal Setting Timing
ø
FRC
ICRD +
OCRDM × 2
Compare-match
signal
Input capture
mask signal
N
N+1
N
Figure 11.16 Input Capture Mask Signal Clearing Timing
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