HD64F2149 Datasheet, PDF (620/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

HICR2 Bit 6—LPC Reset Interrupt Flag (LRST): Interrupt flag that generates an ERRI
interrupt when an LPC hardware reset occurs.
HICR2
Bit 6
LRST
0
1
Description
[Clearing condition]
• Writing 0 after reading LRST = 1
[Setting condition]
• LRESET pin falling edge detection
(Initial value)
HICR2 Bit 5—LPC Shutdown Interrupt Flag (SDWN): Interrupt flag that generates an ERRI
interrupt when an LPC hardware shutdown request is generated.
HICR2
Bit 5
SDWN
0
1
Description
[Clearing conditions]
• Writing 0 after reading SDWN = 1
• LPC hardware reset (LRESET pin falling edge detection)
• LPC software reset (LRSTB = 1)
[Setting condition]
• LPCPD pin falling edge detection
(Initial value)
586