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HD64F2149 Datasheet, PDF (431/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer
TCSR0 Bit 4—Reset Select (RSTS): Reserved. This bit should not be set to 1.
TCSR1 Bit 4—Prescaler Select (PSS): Selects the input clock source for TCNT in WDT1. For
details, see the description of the CKS2 to CKS0 bits below.
Bit 4
PSS
0
1
Description
TCNT counts ø-based prescaler (PSM) divided clock pulses
TCNT counts øSUB-based prescaler (PSS) divided clock pulses
(Initial value)
Bit 3—Reset or NMI (RST/NMI): Specifies whether an internal reset or NMI interrupt is
requested on TCNT overflow in watchdog timer mode.
Bit 3
RST/NMI
0
1
Description
An NMI interrupt is requested
An internal reset is requested
(Initial value)
397