HD64F2149 Datasheet, PDF (961/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

TCSR1—Timer Control/Status Register 1
TCSR1
Bit
7
6
5
4
CMFB CMFA OVF
—
Initial value
0
0
0
1
Read/Write R/(W)* R/(W)* R/(W)* —
H'FFCB
TMR1
3
OS3
0
R/W
2
OS2
0
R/W
1
OS1
0
R/W
0
OS0
0
R/W
Output select 1 and 0
0 0 No change at compare match A
1 0 output at compare match A
1 0 1 output at compare match A
1 Output inverted at compare
match A (toggle output)
Output select 3 and 2
0 0 No change at compare match B
1 0 output at compare match B
1 0 1 output at compare match B
1 Output inverted at compare
match B (toggle output)
Timer overflow flag
0 [Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF
1 [Setting condition]
When TCNT overflows from H'FF to H'00
Compare match flag A
0 [Clearing conditions]
• Read CMFA when CMFA = 1, then write 0 in CMFA
• When the DTC is activated by a CMIA interrupt
1 [Setting condition]
When TCNT = TCORA
Compare match flag B
0 [Clearing conditions]
• Read CMFB when CMFB = 1, then write 0 in CMFB
• When the DTC is activated by a CMIB interrupt
1 [Setting condition]
When TCNT = TCORB
Note: * Only 0 can be written in bits 7 to 5, to clear the flags.
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