HD64F2149 Datasheet, PDF (629/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

STR3 Bit 5—Master Write Mode Flag (MWMF): Set to 1 when the host processor writes to
TWR0. MWMF is cleared to 0 when the slave processor reads TWR15.
Bit 5
MWMF
0
1
Description
[Clearing condition]
(Initial value)
When the slave processor reads TWR15
[Setting condition]
When the host processor writes to TWR0 using I/O write cycle when SWMF =
0
STR3 Bit 4—Slave Write Mode Flag (SWMF): Set to 1 when the slave processor writes to
TWR0. In the event of simultaneous writes by the master and the slave, the master write has
priority. SWMF is cleared to 0 when the host reads TWR15.
Bit 4
SWMF
0
1
Description
[Clearing condition]
(Initial value)
When the host processor reads TWR15 using I/O read cycle, or the slave
processor writes 0 in the SWMF bit
[Setting condition]
When the slave processor writes to TWR0 when MWMF = 0
18B.2.9 SERIRQ Control Registers (SIRQCR0, SIRQCR1)
• SIRQCR0
Bit
7
Q/C
Initial value
0
Slave Read/Write R
Host Read/Write
—
6
5
4
3
2
1
0
—
IEDIR SMIE3B SMIE3A SMIE2 IRQ12E1 IRQ1E1
0
0
0
0
0
0
0
R/W R/W R/W R/W R/W R/W R/W
—
—
—
—
—
—
—
595