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HD64F2149 Datasheet, PDF (741/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer
Table 23.5 External Clock Output Settling Delay Time
Conditions: VCC = 2.7 V to 3.6 V, AVCC = 2.7 V to 3.6 V, VSS = AVSS = 0 V
Item
Symbol
Min
External clock
t * DEXT
500
output settling
delay time
Note: * tDEXT includes RES pulse width (tRESW).
Max
—
Unit
µs
Notes
Figure 23.7
VCC 2.7V
STBY VIH
EXTAL
ø
(internal or external)
RES
tDEXT*
Note: * tDEXT includes RES pulse width (tRESW).
Figure 23.7 External Clock Output Settling Delay Timing
707