HD64F2149 Datasheet, PDF (297/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Port E and port F Output Data Registers (PEODR, PFODR)
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
PE7ODR PE6ODR PE5ODR PE4ODR PE3ODR PE2ODR PE1ODR PE0ODR
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
PF7ODR PF6ODR PF5ODR PF4ODR PF3ODR PF2ODR PF1ODR PF0ODR
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PEODR and PFODR are 8-bit read/write registers that store output data for the pins on ports E and
F (PE7 to PE0 and PF7 to PF0). PEODR and PFODR can always be read from or written to,
regardless of the PEDDR and PFDDR settings.
PEODR and PFODR are initialized to H'00 by a reset and in hardware standby mode. They retain
their prior states in software standby mode.
Port E and port F Input Data Registers (PEPIN, PFPIN)
Bit
7
6
5
4
PE7PIN PE6PIN PE5PIN PE4PIN
Initial value —*
—*
—*
—*
Read/Write
R
R
R
R
Note: * Determined by the state of pins PE7 to PE0.
3
PE3PIN
—*
R
2
PE2PIN
—*
R
1
PE1PIN
—*
R
0
PE0PIN
—*
R
Bit
7
6
5
4
PF7PIN PF6PIN PF5PIN PF4PIN
Initial value —*
—*
—*
—*
Read/Write
R
R
R
R
Note: * Determined by the state of pins PF7 to PF0.
3
PF3PIN
—*
R
2
PF2PIN
—*
R
1
PF1PIN
—*
R
0
PF0PIN
—*
R
Reading PEPIN and PFPIN always returns the pin states.
PEPIN and PFPIN are at the same addresses as PEDDR and PFDDR, respectively. Writing is to
PEDDR or PFDDR and the port E or port F settings will change unless the given byte represents
the current setting.
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