HD64F2149 Datasheet, PDF (148/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Interrupt Source
Origin of
Interrupt
Source
Vector Address
Vector Normal Advanced
Number Mode Mode
ICR
Priority
Address break (PC break)
—
27
H'0036 H'00006C
High
ADI (A/D conversion end)
A/D
28
H'0038 H'000070 ICRB7
Reserved
—
29
H'003A H'000074
to
to
to
47
H'005E H'0000BC
ICIA (input capture A)
ICIB (input capture B)
ICIC (input capture C)
ICID (input capture D)
OCIA (output compare A)
OCIB (output compare B)
FOVI (overflow)
Reserved
Free-running 48
timer
49
50
51
52
53
54
55
H'0060
H'0062
H'0064
H'0066
H'0068
H'006A
H'006C
H'006E
H'0000C0
H'0000C4
H'0000C8
H'0000CC
H'0000D0
H'0000D4
H'0000D8
H'0000DC
ICRB6
Reserved
—
56
H'0070 H'0000E0
to
to
to
63
H'007E H'0000FC
CMIA0 (compare-match A)
CMIB0 (compare-match B)
OVI0 (overflow)
Reserved
8-bit timer 64
channel 0 65
66
67
H'0080
H'0082
H'0084
H'0086
H'000100
H'000104
H'000108
H'00010C
ICRB3
CMIA1 (compare-match A)
CMIB1 (compare-match B)
OVI1 (overflow)
Reserved
8-bit timer 68
channel 1 69
70
71
H'0088
H'008A
H'008C
H'008E
H'000110
H'000114
H'000118
H'00011C
ICRB2
CMIAY (compare-match A)
CMIBY (compare-match B)
OVIY (overflow)
ICIX (input capture X)
8-bit timer 72
channels 73
Y, X
74
75
H'0090
H'0092
H'0094
H'0096
H'000120
H'000124
H'000128
H'00012C
ICRB1
IBF1 (IDR1 reception completed) Host
76
IBF2 (IDR2 reception completed) interface
77
IBF3 (IDR3 reception completed) (XBS)
78
IBF4 (IDR4 reception completed)
79
H'0098
H'009A
H'009C
H'009E
H'000130
H'000134
H'000138
H'00013C
ICRB0
ERI0 (receive error 0)
RXI0 (reception completed 0)
TXI0 (transmit data empty 0)
TEI0 (transmission end 0)
SCI
80
channel 0 81
82
83
H'00A0
H'00A2
H'00A4
H'00A6
H'000140
H'000144
H'000148
H'00014C
ICRC7
Low
114