HD64F2149 Datasheet, PDF (115/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Bit 3—Flash Memory Control Register Enable (FLSHE): Controls CPU access to the flash
memory control registers (FLMCR1, FLMCR2, EBR1, and EBR2), the power-down mode control
registers (SBYCR, LPWRCR, MSTPCRH, and MSTPCRL), and the supporting module control
register (PCSR and SYSCR2).
Bit 3
FLSHE
0
1
Description
Addresses H'(FF)FF80 to H'(FF)FF87 are used for power-down mode (Initial value)
control register and supporting module control register access
Addresses H'(FF)FF80 to H'(FF)FF87 are used for flash memory control
register access
Bit 2—Reserved: Do not write 1 to this bit.
Bits 1 and 0—Internal Clock Select 1 and 0 (ICKS1, ICKS0): These bits, together with bits
CKS2 to CKS0 in TCR, select the clock to be input to TCNT. For details, see section 12, 8-Bit
Timers.
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