HD64F2149 Datasheet, PDF (633/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

SIRQCR1 Bit 5—HIRQ9 Interrupt Enable 3 (IRQ9E3): Enables or disables a HIRQ9 interrupt
request when OBF3A is set by an ODR3 write.
Bit 5
IRQ9E3
0
1
Description
HIRQ9 interrupt request by OBF3A and IRQ9E3 is disabled
[Clearing conditions]
• Writing 0 to IRQ9E3
• LPC hardware reset, LPC software reset
• Clearing OBF3A to 0 (when IEDIR = 0)
[When IEDIR = 0]
HIRQ9 interrupt request by setting OBF3A to 1 is enabled
[When IEDIR = 1]
HIRQ9 interrupt is requested
[Setting condition]
• Writing 1 after reading IRQ9E3 = 0
(Initial value)
SIRQCR1 Bit 4—HIRQ6 Interrupt Enable 3 (IRQ6E3): Enables or disables a HIRQ6 interrupt
request when OBF3A is set by an ODR3 write.
Bit 4
IRQ6E3
0
1
Description
HIRQ6 interrupt request by OBF3A and IRQ6E3 is disabled
[Clearing conditions]
• Writing 0 to IRQ6E3
• LPC hardware reset, LPC software reset
• Clearing OBF3A to 0 (when IEDIR = 0)
[When IEDIR = 0]
HIRQ6 interrupt request by setting OBF3A to 1 is enabled
[When IEDIR = 1]
HIRQ6 interrupt is requested
[Setting condition]
• Writing 1 after reading IRQ6E3 = 0
(Initial value)
599