HD64F2149 Datasheet, PDF (941/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

OCRAR—Output Compare Register AR
OCRAF—Output Compare Register AF
H'FF98
H'FF9A
FRT
FRT
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Used for OCRA operation when OCRAMS = 1 in TOCR
(For details, see section 11.2.4, Output Compare Registers
AR and AF (OCRAR, OCRAF).)
OCRDM—Output Compare Register DM
H'FF9C
FRT
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Read/Write R R R R R R R R R/W R/W R/W R/W R/W R/W R/W R/W
Used for ICRD operation when ICRDMS = 1 in TOCR
(For details, see section 11.2.5, Output Compare Register
DM (OCRDM).)
ICRA—Input Capture Register A
ICRB—Input Capture Register B
ICRC—Input Capture Register C
ICRD—Input Capture Register D
H'FF98
H'FF9A
H'FF9C
H'FF9E
FRT
FRT
FRT
FRT
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Read/Write R R R R R R R R R R R R R R R R
Stores FRC value when input capture signal is input
(ICRC and ICRD can be used for buffer operation.
For details, see section 11.2.3, Input Capture Registers
A to D (ICRA to ICRD).)
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