HD64F2149 Datasheet, PDF (592/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

18A.2.2 System Control Register 2 (SYSCR2)
Bit
7
6
5
4
KWUL1 KWUL0 P6PUE —
Initial value
0
0
0
0
Read/Write
R/W
R/W
R/W
—
3
SDE
0
R/W
2
CS4E
0
R/W
1
CS3E
0
R/W
0
HI12E
0
R/W
SYSCR2 is an 8-bit readable/writable register which controls the chip operations. Host interface
functions are enabled or disabled by the HI12E bit in SYSCR2. The number of channels that can
be used can be extended to a maximum of four by means of the CS3E bit and CS4E bit. SYSCR2
is initialized to H'00 by a reset and in hardware standby mode.
Bits 7 and 6—Key Wakeup Level 1 and 0 (KWUL1, KWUL0): The port 6 input level can be
set and changed by software. For details see section 8, I/O Ports.
Bit 5—Port 6 MOS Input Pull-Up Extra (P6PUE): Controls and selects the current
specification for the port 6 MOS input pull-up function connected by means of KMPCR settings.
For details see section 8, I/O Ports.
Bit 4—Reserved: Do not write 1 to this bit.
Bit 3—Shutdown Enable (SDE): Enables or disables the host interface pin shutdown function.
When this function is enabled, host interface pin functions can be halted, and the pins placed in the
high-impedance state, according to the state of the HIFSD pin.
Bit 3
SDE
0
1
Description
Host interface pin shutdown function disabled
Host interface pin shutdown function enabled
(Initial value)
Bit 2—CS4 Enable (CS4E): Enables or disables host interface channel 4 functions in slave mode.
When these functions are enabled, channel 4 pins are enabled and processing can be performed for
data transfer between the slave and the host processors.
Bit 2
CS4E
0
1
Description
Host interface pin channel 4 functions disabled
Host interface pin channel 4 functions enabled
(Initial value)
558