HD64F2149 Datasheet, PDF (147/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

5.3.2 Internal Interrupts
There are 48 sources for internal interrupts from on-chip supporting modules, plus one software
interrupt source (address break).
• For each on-chip supporting module there are flags that indicate the interrupt request status,
and enable bits that select enabling or disabling of these interrupts. If any one of these is set to
1, an interrupt request is issued to the interrupt controller.
• The interrupt control level can be set by means of ICR.
• The DTC can be activated by an FRT, TMR, SCI, or other interrupt request. When the DTC is
activated by an interrupt, the interrupt control mode and interrupt mask bits have no effect.
5.3.3 Interrupt Exception Vector Table
Table 5.4 shows interrupt exception handling sources, vector addresses, and interrupt priorities.
For default priorities, the lower the vector number, the higher the priority.
Priorities among modules can be set by means of ICR. The situation when two or more modules
are set to the same priority, and priorities within a module, are fixed as shown in table 5.4.
Table 5.4 Interrupt Sources, Vector Addresses, and Interrupt Priorities
Interrupt Source
NMI
IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6, KIN7 to KIN0
IRQ7, KIN15 to KIN8, WUE7 to
WUE0
SWDTEND (software activation
interrupt end)
WOVI0 (interval timer)
WOVI1 (interval timer)
Origin of
Interrupt
Source
External
pin
DTC
Watchdog
timer 0
Watchdog
timer 1
Vector Address
Vector Normal Advanced
Number Mode Mode
ICR Priority
7
H'000E H'00001C
High
16
H'0020 H'000040 ICRA7
17
H'0022 H'000044 ICRA6
18
H'0024 H'000048 ICRA5
19
H'0026 H'00004C
20
H'0028 H'000050 ICRA4
21
H'002A H'000054
22
H'002C H'000058 ICRA3
23
H'002E H'00005C
24
H'0030 H'000060 ICRA2
25
H'0032 H'000064 ICRA1
26
H'0034 H'000068 ICRA0
Low
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