HD64F2149 Datasheet, PDF (788/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

25.3.4 Timing of On-Chip Supporting Modules
Tables 25.8 to 25.10 show the on-chip supporting module timing. The only on-chip supporting
modules that can operate in subclock operation (ø = 32.768 kHz) are the I/O ports, external
interrupts (NMI and IRQ0, 1, 2, 6, and 7), the watchdog timer, and the 8-bit timer (channels 0 and
1).
Table 25.8 Timing of On-Chip Supporting Modules (1)
Condition: V_CC = 2.7 V to 3.6 V, V_CCB = 2.7 V to 5.5 V, V_SS = 0 V, ø = 32.768 kHz*, 2 MHz to
maximum operating frequency, T_a = –20 to +75°C
Item
I/O ports Output data delay time
Input data setup time
Input data hold time
FRT
Timer output delay time
Timer input setup time
Timer clock input setup time
Timer clock Single edge
pulse width _{Both edges}
TMR
Timer output delay time
Timer reset input setup time
Timer clock input setup time
Timer clock Single edge
pulse width _{Both edges}
PWM, Pulse output delay time
PWMX
SCI
Input clock Asynchronous
cycle
Synchronous
Input clock pulse width
Input clock rise time
Input clock fall time
Transmit data delay time
(synchronous)
Condition
10 MHz
Symbol Min
Max
t _PWD
—
t _PRS
50
t _PRH
50
t _FTOD
—
t _FTIS
50
t _FTCS
50
t _FTCWH
1.5
t _FTCWL
2.5
t _TMOD
—
t _TMRS
50
t _TMCS
50
t _TMCWH
1.5
t _TMCWL
2.5
t _PWOD
—
100
—
—
100
—
—
—
—
100
—
—
—
—
100
t _Scyc
4
6
t _SCKW
0.4
t _SCKr
—
t _SCKf
—
t _TXD
—
—
—
0.6
1.5
1.5
100
Unit Test Conditions
ns Figure 25.14
ns Figure 25.15
Figure 25.16
t _cyc
ns Figure 25.17
Figure 25.19
Figure 25.18
t _cyc
ns Figure 25.20
t_cyc Figure 25.21
t _Scyc
t _cyc
ns Figure 25.22
754