HD64F2149 Datasheet, PDF (210/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Interrupt Source
Origin of
Vector Vector
Interrupt Source Number Address DTCE* Priority
RXI1 (reception completed 1)
SCI channel 1 85
H'04AA DTCEC0
TXI1 (transmit data empty 1)
86
H'04AC DTCED7
RXI2 (reception completed 2)
SCI channel 2 89
H'04B2 DTCED6
TXI2 (transmit data empty 2)
90
H'04B4 DTCED5
IICI0 (IIC0 1-byte transmission/ IIC0
reception completed)
92
H'04B8 DTCED4
IICI1 (IIC1 1-byte transmission/ IIC1
reception completed)
94
H'04BC DTCED3
ERRI (transfer error etc.)
LPC
104
H'04D8 DTCEE3
IBFI1 (IDR1 reception completed)
105
H'04DA DTCEE2
IBFI2 (IDR2 reception completed)
106
H'04DC DTCEE1
IBFI3 (IDR3 reception completed)
107
H'04DE DTCEE0 Low
Note: * DTCE bits with no corresponding interrupt are reserved, and should be written with 0.
7.3.4 Location of Register Information in Address Space
Figure 7.5 shows how the register information should be located in the address space.
Locate the MRA, SAR, MRB, DAR, CRA, and CRB registers, in that order, from the start address
of the register information (vector address contents). In chain transfer, locate the register
information in consecutive areas.
Locate the register information in the on-chip RAM (addresses: H'FFEC00 to H'FFEFFF).
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