HD64F2149 Datasheet, PDF (939/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

TCR—Timer Control Register
H'FF96
Bit
Initial value
Read/Write
7
IEDGA
0
R/W
6
IEDGB
0
R/W
5
IEDGC
0
R/W
4
IEDGD
0
R/W
3
2
BUFEA BUFEB
0
0
R/W R/W
1
CKS1
0
R/W
FRT
0
CKS0
0
R/W
Clock select
0 0 ø/2 internal clock source
1 ø/8 internal clock source
1 0 ø/32 internal clock source
1 External clock source
(rising edge)
Buffer enable B
0 ICRD is not used as a buffer
register for input capture B
1 ICRD is used as a buffer
register for input capture B
Buffer enable A
0 ICRC is not used as a buffer register for
input capture A
1 ICRC is used as a buffer register for input
capture A
Input edge select D
0 Capture on the falling edge of FTID
1 Capture on the rising edge of FTID
Input edge select C
0 Capture on the falling edge of FTIC
1 Capture on the rising edge of FTIC
Input edge select B
0 Capture on the falling edge of FTIB
1 Capture on the rising edge of FTIB
Input edge select A
0 Capture on the falling edge of FTIA
1 Capture on the rising edge of FTIA
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