HD64F2149 Datasheet, PDF (954/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

STCR—Serial Timer Control Register
Bit
7
6
5
IICS IICX1 IICX0
Initial value
0
0
0
Read/Write R/W
R/W
R/W
H'FFC3
4
3
2
IICE FLSHE —
0
0
0
R/W R/W R/W
System
1
ICKS1
0
R/W
0
ICKS0
0
R/W
Internal Clock Source
Select^*1
Reserved bit
Flash memory control register enable
0 Flash memory control register not selected
1 Flash memory control register selected
I²C master enable
0 CPU access to SCI0, SCI1, and SCI2 control
registers is enabled
1 CPU access to I²C bus interface data, PWMX and
control registers is enabled
I²C transfer select 1 and 0^*2
I²C extra buffer select
0 PA7 to PA4 are normal I/O pins
1 PA7 to PA4 are I/O pins with bus driving capability
Notes: 1. Used for 8-bit timer input clock selection. For details, see section 12.2.4, Timer
Control Register (TCR).
2. Used for I²C bus interface transfer clock selection. For details, see section 16.2.4,
I²C Bus Mode Register (ICMR).
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