HD64F2149 Datasheet, PDF (808/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Mnemonic
Addressing Mode and
Instruction Length (Bytes)
Operation
Condition Code
No. of
States^*1
I HNZVC
DAS
DAS Rd
MULXU MULXU.B Rs,Rd
MULXU.W Rs,ERd
MULXS MULXS.B Rs,Rd
MULXS.W Rs,ERd
DIVXU DIVXU.B Rs,Rd
DIVXU.W Rs,ERd
DIVXS DIVXS.B Rs,Rd
DIVXS.W Rs,ERd
CMP
NEG
EXTU
EXTS
CMP.B #xx:8,Rd
CMP.B Rs,Rd
CMP.W #xx:16,Rd
CMP.W Rs,Rd
CMP.L #xx:32,ERd
CMP.L ERs,ERd
NEG.B Rd
NEG.W Rd
NEG.L ERd
EXTU.W Rd
EXTU.L ERd
EXTS.W Rd
EXTS.L ERd
TAS
TAS @ERd^*2
B
2
B
2
W
2
B
4
W
4
B
2
W
2
B
4
W
4
B2
B
2
W4
W
2
L6
L
2
B
2
W
2
L
2
W
2
L
2
W
2
L
2
B
4
Rd8 decimal adjust →Rd8
Rd8×Rs8→Rd16 (unsigned
multiplication)
Rd16×Rs16→ERd32 (unsigned
multiplication)
Rd8×Rs8→Rd16 (signed
multiplication)
Rd16×Rs16→ERd32 (signed
multiplication)
Rd16÷Rs8→Rd16
(RdH: remainder, RdL: quotient)
(unsigned division)
ERd32÷Rs16→ERd32
(Ed: remainder, Rd: quotient)
(unsigned division)
Rd16÷Rs8→Rd16
(RdH: remainder, RdL: quotient)
(signed division)
ERd32÷Rs16→ERd32
(Ed: remainder, Rd: quotient)
(signed division)
Rd8-#xx:8
Rd8-Rs8
Rd16-#xx:16
Rd16-Rs16
ERd32-#xx:32
ERd32-ERs32
0-Rd8→Rd8
0-Rd16→Rd16
0-ERd32→ERd32
0 → (<bits 5 to 8> of Rd16)
0 → (<bits 31 to 16> of ERd32)
(<bit 7> of Rd16) →
(<bits 15 to 8> of Rd16)
(<bit 15> of ERd32) →
(<bits 31 to 16> of ERd32)
ERd-0 → CCR set, (1) →
(<bit 7> of @ERd)
—*
*— 1
— — — — — — 12
— — — — — — 20
——
— — 13
——
— — 21
— — [6] [7] — — 12
— — [6] [7] — — 20
— — [8] [7] — — 13
— — [8] [7] — — 21
—
—
— [3]
— [3]
— [4]
— [4]
—
—
—
—— 0
—— 0
——
——
——
1
1
2
1
3
1
1
1
1
0— 1
0— 1
0— 1
0— 1
0— 4
774