HD64F2149 Datasheet, PDF (436/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

TCNT value
H'FF
Overflow
H'00
WT/IT = 1 H'00 written
TME = 1 to TCNT
Time
OVF = 1*
WT/IT = 1 H'00 written
TME = 1 to TCNT
RESO and internal
reset generated
RESO signal
Internal reset signal
132 system
clock periods
WT/IT: Timer mode select bit
TME: Timer enable bit
OVF: Overflow flag
518 system
clock periods
Note: * Cleared to 0 by an internal reset when OVF is set to 1. XRST is cleared to 0.
Figure 14.3 Operation in Watchdog Timer Mode (RST/NMI = 1)
14.3.2 Interval Timer Operation
To use the WDT as an interval timer, clear the WT/IT bit in TCSR to 0 and set the TME bit to 1.
An interval timer interrupt (WOVI) is generated each time TCNT overflows, provided that the
WDT is operating as an interval timer, as shown in figure 14.4. This function can be used to
generate interrupt requests at regular intervals.
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