HD64F2149 Datasheet, PDF (283/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Port B Output Data Register (PBODR)
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
PB7ODR PB6ODR PB5ODR PB4ODR PB3ODR PB2ODR PB1ODR PB0ODR
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PBODR is an 8-bit readable/writable register that stores output data for the port B pins (PB7 to
PB0). PBODR can always be read or written to, regardless of the contents of PBDDR.
PBODR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode.
Port B Input Data Register (PBPIN)
Bit
7
6
5
4
3
2
1
0
PB7PIN PB6PIN PB5PIN PB4PIN PB3PIN PB2PIN PB1PIN PB0PIN
Initial value
—*
—*
—*
—*
—*
—*
—*
—*
Read/Write
R
R
R
R
R
R
R
R
Note: * Determined by the state of pins PB7 to PB0.
Reading PBPIN always returns the pin states.
PBPIN has the same address as P8DDR. If a write is performed, data will be written to P8DDR
and the port 8 settings will change.
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