HD64F2149 Datasheet, PDF (371/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Bits 2 to 0—Clock Select 2 to 0 (CKS2 to CKS0): These bits select whether the clock input to
TCNT is an internal or external clock.
The input clock can be selected from either six or three clocks, all divided from the system clock
(ø). The falling edge of the selected internal clock triggers the count.
When use of an external clock is selected, three types of count can be selected: at the rising edge,
the falling edge, and both rising and falling edges.
Some functions differ between channel 0 and channel 1, because of the cascading function.
TCR
STCR
Bit 2 Bit 1 Bit 0 Bit 1 Bit 0
Channel CKS2 CKS1 CKS0 ICKS1 ICKS0 Description
0
0 0 0 — — Clock input disabled
(Initial value)
0 0 1 —0
ø/8 internal clock source, counted on the falling edge
0 0 1 —1
ø/2 internal clock source, counted on the falling edge
0 1 0 —0
ø/64 internal clock source, counted on the falling
edge
0 1 0 —1
ø/32 internal clock source, counted on the falling
edge
0 1 1 —0
ø/1024 internal clock source, counted on the falling
edge
0 1 1 —1
ø/256 internal clock source, counted on the falling
edge
1 0 0 — — Counted on TCNT1 overflow signal*
1
0 0 0 — — Clock input disabled
(Initial value)
001
0
— ø/8 internal clock source, counted on the falling edge
001
1
— ø/2 internal clock source, counted on the falling edge
010
0
— ø/64 internal clock source, counted on the falling
edge
010
1
— ø/128 internal clock source, counted on the falling
edge
011
0
— ø/1024 internal clock source, counted on the falling
edge
011
1
— ø/2048 internal clock source, counted on the falling
edge
1 0 0 — — Counted on TCNT0 compare-match A*
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