HD64F2149 Datasheet, PDF (753/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Bit 5
NESEL
0
1
Description
Sampling at ø divided by 32
Sampling at ø divided by 4
(Initial value)
Bit 4—Subclock Input Enable (EXCLE): Controls subclock input from the EXCL pin.
Bit 4
EXCLE
0
1
Description
Subclock input from EXCL pin is disabled
Subclock input from EXCL pin is enabled
(Initial value)
Bit 3 (H8S/2149)—Reserved: These bits cannot be modified and are always read as 0.
Bit 3 (H8S/2169)—Reserved: Do not write 1 to this bit.
Bits 2 to 0—Reserved: These bits cannot be modified and are always read as 0.
24.2.3 Timer Control/Status Register (TCSR)
TCSR1
Bit
Initial value
Read/Write
7
OVF
0
R/(W)*
6
WT/IT
0
R/W
5
TME
0
R/W
4
PSS
0
R/W
3
2
RST/NMI CKS2
0
0
R/W R/W
1
CKS1
0
R/W
0
CKS0
0
R/W
Note: * Only 0 can be written in bit 7, to clear the flag.
TCSR1 is an 8-bit readable/writable register that performs selection of the WDT1 TCNT input
clock, mode, etc.
Only bit 4 is described here. For details of the other bits, see section 14.2.2, Timer Control/Status
Register (TCSR).
TCSR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
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