HD64F2149 Datasheet, PDF (9/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

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Item
Revision (See Manual for Details)
8.1 Overview
Amendments due to introduction of the H8S/2169
Description added
8.12.3 Pin Functions
Table 8.24 Port B Pin Functions
PB1 and PB0 : Table amended
8.13 Additional Overview Added
for H8S/2169
8.14 Ports C, D
Added
8.15 Ports E, F
Added
8.16 Port G
Added
9.1.1 Features
Carrier frequency amended
9.1.4 Register
Configuration
Table 9.2 PWM Timer Module Registers
Note 2 added
9.2.1 PWM Register Select Table 9.3 Resolution, PWM Conversion Period, and
Carrier Frequency when φ = 10 MHz
Completely amended due to changes of the system clock
10.1.4 Register
Configuration
Table 10.2 Register Configuration
Note 2 amended
10.2.2 D/A Data Registers Address amended when bit 1 is 1
A and B
11.6 Usage Notes
Figure 11.21 Contention between OCRAR/OCRAF Write
and Compare-Match Added
12.2.6 Serial/Timer Control Bit 3: Description amended
Register
12.3.6 Input Capture
Operation
Added
13.3.1 PWM Decoding
Table 13.4 Examples of TCORB Settings
φ = 12 MHz or more deleted
Figure 13.2 Timing Chart for PWM Decoding
IHI signal amended
13.3.3 Measurement of 8- External reset signal description amended
Bit Timer Divided
Waveform Period
14.2.2 Timer Control/Status Bit 7: Note added
Register
Bits 2 to 0: Overflow Period amended
14.5.6 OVF Flag Clear
Condition
Added
15.1.1 Features
Capability of transmit and receive clock output
Added