HD64F2149 Datasheet, PDF (332/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

11.1.2 Block Diagram
Figure 11.1 shows a block diagram of the free-running timer.
External
clock source
FTCI
Internal
clock sources
ø/2
ø/8
ø/32
Clock select
Clock
Compare-
match A
FTOA
FTOB
Overflow
Clear
OCRA R/F (H/L)
+
OCRA (H/L)
Comparator A
FRC (H/L)
FTIA
FTIB
FTIC
FTID
Compare-
match B
Control
logic
Input capture
Comparator B
OCRB (H/L)
ICRA (H/L)
ICRB (H/L)
ICRC (H/L)
ICRD (H/L)
Comparator M
Compare-match M
+
×1
×2
OCRDM L
Internal
data bus
TCSR
TIER
TCR
ICIA
ICIB
ICIC
ICID Interrupt signals
OCIA
OCIB
FOVI
Legend:
OCRA, B: Output compare register A, B (16 bits)
FRC:
Free-running counter (16 bits)
ICRA, B, C, D: Input capture register A, B, C, D (16 bits)
TCSR:
Timer control/status register (8 bits)
TOCR
TIER: Timer interrupt enable register (8 bits)
TCR: Timer control register (8 bits)
TOCR: Timer output compare control
register (8 bits)
Figure 11.1 Block Diagram of 16-Bit Free-Running Timer
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