HD64F2149 Datasheet, PDF (319/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

10.1.4 Register Configuration
Table 10.2 lists the registers of the PWM (D/A) module.
Table 10.2 Register Configuration
Name
Abbreviation R/W
Initial value Address*¹
PWM (D/A) control register
DACR
R/W H'30
H'FFA0*²
PWM (D/A) data register A high
DADRAH
R/W H'FF
H'FFA0*²
PWM (D/A) data register A low
DADRAL
R/W H'FF
H'FFA1*²
PWM (D/A) data register B high
DADRBH
R/W H'FF
H'FFA6*²
PWM (D/A) data register B low
DADRBL
R/W H'FF
H'FFA7*²
PWM (D/A) counter high
DACNTH
R/W H'00
H'FFA6*²
PWM (D/A) counter low
DACNTL
R/W H'03
H'FFA7*²
Module stop control register
MSTPCRH
R/W H'3F
H'FF86
MSTPCRL
R/W H'FF
H'FF87
Notes: 1. Lower 16 bits of the address.
2. Some of the PWM registers are located in the same addresses as other registers,
switching is made by setting IICE bit in serial/timer control register (STCR).
The same addresses are shared by DADRAH and DACR, and by DADRB and DACNT.
Switching is performed by the REGS bit in DACNT or DADRB.
10.2 Register Descriptions
10.2.1 PWM (D/A) Counter (DACNT)
DACNTH
DACNTL
Bit (CPU)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
BIT (Counter) ^{7 6 5 4 3 2 1 0 8 9 10 11 12 13 — —}
— REGS
Initial value
0 0 000 00 00 0 000 011
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W — R/W
DACNT is a 14-bit readable/writable up-counter that increments on an input clock pulse. The
input clock is selected by the clock select bit (CKS) in DACR. The CPU can read and write the
DACNT value, but since DACNT is a 16-bit register, data transfers between it and the CPU are
performed using a temporary register (TEMP). See section 10.3, Bus Master Interface, for details.
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