HD64F2149 Datasheet, PDF (404/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Bit 4
CBOE
0
1
Description
The P27/A15/PW15/CBLANK pin functions as the P27/A15/PW15 pin
In mode 1 (expanded mode with on-chip ROM disabled):
The P27/A15/PW15/CBLANK pin functions as the A15 pin
In modes 2 and 3 (modes with on-chip ROM enabled):
The P27/A15/PW15/CBLANK pin functions as the CBLANK pin
(Initial value)
Bits 3 to 0—Output Synchronization Signal Inversion (HOINV, VOINV, CLOINV,
CBOINV): These bits select inversion of the output phase of the horizontal synchronization signal
(HSYNCO), the vertical synchronization signal (VSYNCO), the clamp waveform (CLAMPO),
and the blank waveform (CBLANK).
Bit 3
HOINV
0
1
Description
The IHO signal is used directly as the HSYNCO output
The IHO signal is inverted before use as the HSYNCO output
(Initial value)
Bit 2
VOINV
0
1
Description
The IVO signal is used directly as the VSYNCO output
The IVO signal is inverted before use as the VSYNCO output
(Initial value)
Bit 1
CLOINV
0
1
Description
The CLO signal (CL1, CL2, CL3, or CL4 signal) is used directly as the (Initial value)
CLAMPO output
The CLO signal (CL1, CL2, CL3, or CL4 signal) is inverted before use as
the CLAMPO output
Bit 0
CBOINV
0
1
Description
The CBLANK signal is used directly as the CBLANK output
The CBLANK signal is inverted before use as the CBLANK output
(Initial value)
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