HD64F2149 Datasheet, PDF (432/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Bits 2 to 0—Clock Select 2 to 0 (CKS2 to CKS0): These bits select an internal clock source,
obtained by dividing the system clock (ø), or subclock (øSUB) for input to TCNT.
• WDT0 input clock selection
Bit 2 Bit 1 Bit 0
Description
CKS2 CKS1 CKS0 Clock
Overflow Period* (when ø = 10 MHz)
0
0
0
ø/2 (Initial value)
51.2 µs
1
ø/64
1.6 ms
1
0
ø/128
3.2 ms
1
ø/512
13.1 ms
1
0
0
ø/2048
52.4 ms
1
ø/8192
209.7 ms
1
0
ø/32768
838.9 ms
1
ø/131072
3.36 s
Note: * The overflow period is the time from when TCNT starts counting up from H'00 until overflow
occurs.
398