HD64F2149 Datasheet, PDF (846/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Instruction Mnemonic
Instruction
Fetch
I
Branch
Address
Read
J
Stack
Operation
K
JSR
JSR @ERn
Normal 2
1
Advanced 2
2
JSR @aa:24 Normal 2
1
Advanced 2
2
JSR @@aa:8 Normal 2
1
1
Advanced 2
2
2
LDC
LDC #xx:8,CCR
1
LDC #xx:8,EXR
2
LDC Rs,CCR
1
LDC Rs,EXR
1
LDC @ERs,CCR
2
LDC @ERs,EXR
2
LDC @(d:16,ERs),CCR
3
LDC @(d:16,ERs),EXR
3
LDC @(d:32,ERs),CCR
5
LDC @(d:32,ERs),EXR
5
LDC @ERs+,CCR
2
LDC @ERs+,EXR
2
LDC @aa:16,CCR
3
LDC @aa:16,EXR
3
LDC @aa:32,CCR
4
LDC @aa:32,EXR
4
LDM* ⁴
LDM.L @SP+, (ERn-ERn+1) 2
4
LDM.L @SP+, (ERn-ERn+2) 2
6
LDM.L @SP+, (ERn-ERn+3) 2
8
LDMAC LDMAC ERs, MACH
Cannot be used with the LSI.
LDMAC ERs, MACL
MAC
MAC @ERn+, @ERm+
MOV
MOV.B #xx:8,Rd
1
MOV.B Rs,Rd
1
MOV.B @ERs,Rd
1
MOV.B @(d:16,ERs),Rd
2
MOV.B @(d:32,ERs),Rd
4
MOV.B @ERs+,Rd
1
MOV.B @aa:8,Rd
1
MOV.B @aa:16,Rd
2
Byte Data
Access
L
1
1
1
1
1
1
Word Data
Access
M
1
1
1
1
1
1
1
1
1
1
1
1
Internal
Operation
N
1
1
1
1
1
1
1
1
812