HD64F2149 Datasheet, PDF (301/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Port G Data Direction Register (PGDDR)
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
PG7DDR PG6DDR PG5DDR PG4DDR PG3DDR PG2DDR PG1DDR PG0DDR
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
PGDDR is an 8-bit write-only register, the individual bits of which select input or output for the
pins of port G. PGDDR is at the same address as PGPIN, and if read, will return the port G pin
states.
Setting a PGDDR bit to 1 makes the corresponding pins on port G an output pin, while clearing
the bit to 0 makes the pin an input pin.
PGDDR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode.
Port G Output Data Register (PGODR)
Bit
7
6
5
4
3
2
1
0
PG7ODR PG6ODR PG5ODR PG4ODR PG3ODR PG2ODR PG1ODR PG0ODR
Initial value
0
0
0
0
0
0
0
0
Read/Write R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PGODR is an 8-bit read/write register that stores output data for the pins on port G (PG7 to PG0).
PGODR can always be read from or written to, regardless of the PGDDR settings.
PGODR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode.
Port G Input Data Register (PGPIN)
Bit
7
6
5
4
3
2
1
0
PG7PIN PG6PIN PG5PIN PG4PIN PG3PIN PG2PIN PG1PIN PG0PIN
Initial value —*
—*
—*
—*
—*
—*
—*
—*
Read/Write
R
R
R
R
R
R
R
R
Note: * Determined by the state of pins PG7 to PG0.
Reading PGPIN always returns the pin states.
PGPIN is at the same address as PGDDR. Writing is to PGDDR and the port G settings will
change unless the given byte represents the current settings.
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