HD64F2149 Datasheet, PDF (502/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

When the serial data is 1, no pulse is output.
Start
bit
UART frame
Data
Stop
bit
0
10
100
110
1
Transmission
Start
bit
01
Reception
IR frame
Data
01
0 01 1
Stop
bit
01
Bit
interval
Pulse width is 1.6 µs
to 3/16 bit interval
Figure 15.22 IrDA Transmit/Receive Operations
Reception: In reception, IR frame data is converted to a UART frame by the IrDA interface, and
input to the SCI.
When a high-level pulse is detected, 0 data is output, and if there is no pulse during a one-bit
interval, 1 data is output. Note that a pulse shorter than the minimum pulse width of 1.41 µs will
be identified as a 0 signal.
High-Level Pulse Width Selection: Table 15.12 shows possible settings for bits IrCKS2 to
IrCKS0 (minimum pulse width), and H8S/2169 or H8S/2149 operating frequencies and bit rates,
for making the pulse width shorter than 3/16 times the bit rate in transmission.
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