HD64F2149 Datasheet, PDF (247/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Port 4 Data Direction Register (P4DDR)
Bit
7
6
5
4
3
2
1
0
P47DDR P46DDR P45DDR P44DDR P43DDR P42DDR P41DDR P40DDR
Initial value
0
0
0
0
0
0
0
0
Read/Write
W
W
W
W
W
W
W
W
P4DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 4. P4DDR cannot be read; if it is, an undefined value will be returned.
When a bit in P4DDR is set to 1, the corresponding pin functions as an output port, and when
cleared to 0, as an input port.
P4DDR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode. As 14-bit PWM and SCI2 are initialized in software standby mode, the
pin states are determined by the TMR0, TMR1, XBS, IIC1, P4DDR, and P4DR specifications.
Port 4 Data Register (P4DR)
Bit
Initial value
Read/Write
7
P47DR
0
R/W
6
P46DR
0
R/W
5
P45DR
0
R/W
4
P44DR
0
R/W
3
P43DR
0
R/W
2
P42DR
0
R/W
1
P41DR
0
R/W
0
P40DR
0
R/W
P4DR is an 8-bit readable/writable register that stores output data for the port 4 pins (P47 to P40).
If a port 4 read is performed while P4DDR bits are set to 1, the P4DR values are read directly,
regardless of the actual pin states. If a port 4 read is performed while P4DDR bits are cleared to 0,
the pin states are read.
P4DR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode.
8.5.3 Pin Functions
Port 4 pins also function as 14-bit PWM output pins (PWX1, PWX0), 8-bit timer 0 and 1 (TMR0,
TMR1) I/O pins (TMCI0, TMRI0, TMO0, TMCI1, TMRI1, TMO1), timer connection I/O pins
(CSYNCI, HSYNCI, HSYNCO), SCI2 I/O pins (TxD2, RxD2, SCK2), IrDA interface I/O pins
(IrTxD, IrRxD), host interface (XBS) output pins (HIRQ12, HIRQ1, HIRQ11), and the IIC1 I/O
pin (SDA1). The port 4 pin functions are shown in table 8.9.
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