HD64F2149 Datasheet, PDF (36/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Table 1.1 Overview
Item
CPU
Operating modes
Specifications
• General-register architecture
 Sixteen 16-bit general registers (also usable as sixteen 8-bit registers
or eight 32-bit registers)
• High-speed operation suitable for realtime control
 Maximum operating frequency: 10 MHz/3 V
 High-speed arithmetic operations
8/16/32-bit register-register add/subtract: 100 ns (10 MHz operation)
16 × 16-bit register-register multiply: 2000 ns (10 MHz operation)
32 ÷ 16-bit register-register divide: 2000 ns (10 MHz operation)
• Instruction set suitable for high-speed operation
 Sixty-five basic instructions
 8/16/32-bit transfer/arithmetic and logic instructions
 Unsigned/signed multiply and divide instructions
 Powerful bit-manipulation instructions
• Two CPU operating modes
 Normal mode: 64-kbyte address space
 Advanced mode: 16-Mbyte address space
• Three MCU operating modes
External Data Bus
CPU Operating
Mode Mode
Description
On-Chip Initial
ROM
Value
Max.
Value
1
Normal
Expanded mode with Disabled 8 bits
on-chip ROM disabled
16 bits
2
Advanced
Expanded mode with Enabled 8 bits
on-chip ROM enabled
16 bits
3
Normal
Single-chip mode
Expanded mode with
on-chip ROM enabled
Enabled
None
8 bits
16 bits
Single-chip mode
None
Bus controller
• 2-state or 3-state access space can be designated for external expansion
areas
• Number of program wait states can be set for external expansion areas
2