HD64F2149 Datasheet, PDF (105/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

2.9.3 On-Chip Supporting Module Access Timing (Internal I/O Register 1 and 2)
The on-chip supporting modules (Internal I/O Register 1 and 2) are accessed in two states. The
data bus is either 8 bits or 16 bits wide, depending on the particular internal I/O register being
accessed. Figure 2.19 shows the access timing for the on-chip supporting modules (Internal I/O
Register 1 and 2). Figure 2.20 shows the pin states.
Bus cycle
T1
T2
ø
Internal address bus
Address
Read
access
Internal read signal
Internal data bus
Write
access
Internal write signal
Internal data bus
Read data
Write data
Figure 2.19 On-Chip Supporting Module (Internal I/O Register 1 and 2)Access Cycle
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