HD64F2149 Datasheet, PDF (803/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Appendix A Instruction Set
A.1 Instruction
Operation Notation
Rd
General register (destination )*¹
Rs
General register (source)*¹
Rn
General register*¹
ERn
General register (32-bit register)
MAC
Multiply-and-accumulate register (32-bit register)*²
(EAd)
Destination operand
(EAs)
Source operand
EXR
Extend register
CCR
Condition code register
N
N (negative) flag in CCR
Z
Z (zero) flag in CCR
V
V (overflow) flag in CCR
C
C (carry) flag in CCR
PC
Program counter
SP
Stack pointer
#IMM
Immediate data
disp
Displacement
+
Addition
–
Subtraction
×
Multiplication
÷
Division
∧
Logical AND
∨
Logical OR
⊕
Exclusive logical OR
→
Transfer from left-hand operand to right-hand operand, or transition from left-
hand state to right-hand state
¬
NOT (logical complement)
()<>
Operand contents
:8/:16/:24/:32 8-, 16-, 24-, or 32-bit length
Notes: 1. General registers include 8-bit registers (R0H to R7H, R0L to R7L), 16-bit registers (R0
to R7, E0 to E7), and 32-bit registers (ER0 to ER7).
2. MAC instructions cannot be used in the H8S/2149.
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