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| HD64F2149 Datasheet, PDF (330/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer | |||
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2. OS = 1 (DADR corresponds to TH)
a. CFS = 0 [base cycle = resolution (T) Ã 64]
1 conversion cycle
tf1
tf2
tf255
tf256
tH1
tH2
tH3
tf1 = tf2 = tf3 = · · · = tf255 = tf256 = T à 64
tH1 + tH2 + tH3 + · · · + tH255 + tH256 = TH
tH255
Figure 10.4 (3) Output Waveform
b. CFS = 1 [base cycle = resolution (T) Ã 256]
1 conversion cycle
tf1
tf2
tf63
tH256
tf64
tH1
tH2
tH3
tf1 = tf2 = tf3 = · · · = tf63 = tf64 = T à 256
tH1 + tH2 + tH3 + · · · + tH63 + tH64 = TH
tH63
tH64
Figure 10.4 (4) Output Waveform
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