HD64F2149 Datasheet, PDF (612/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

SYSCR and SYSCR2 are 8-bit readable/writable registers that control the chip operations. The
settings of HIF:XBS related bits do not affect the operation of the chip’s HIF:LPC. However, for
reasons relating to the configuration of the program development tool (emulator), when the
HIF:LPC is used, bit HI12E in SYSCR2 should not be set to 1.
For details of the individual bits, see section 18A.2.1, System Control Register (SYSCR), section
18A.2.2, System Control Register 2 (SYSCR2), section 3.2.2, System Control Register (SYSCR),
section 5.2.1, System Control Register (SYSCR), and section 8, I/O Ports.
SYSCR and SYSCR2 are initialized to H'09 and H'00, respectively, by a reset and in hardware
standby mode.
18B.2.2 Host Interface Control Registers 0 and 1 (HICR0, HICR1)
• HICR0
Bit
Initial value
Slave Read/Write
Host Read/Write
7
LPC3E
0
R/W
—
6
LPC2E
0
R/W
—
5
4
3
LPC1E FGA20E SDWNE
0
0
0
R/W R/W R/W
—
—
—
2
PMEE
0
R/W
—
1
LSMIE
0
R/W
—
0
LSCIE
0
R/W
—
• HICR1
Bit
7
6
5
4
3
2
LPCBSY CLKREQ IRQBSY LRSTB SDWNB PMEB
Initial value
0
0
0
0
0
0
Slave Read/Write R
R
R
R/W R/W R/W
Host Read/Write
—
—
—
—
—
—
1
LSMIB
0
R/W
—
0
LSCIB
0
R/W
—
HICR0 and HICR1 contain control bits that enable or disable host interface functions, control bits
that determine pin output and the internal state of the host interface, and status flags that monitor
the internal state of the host interface.
HICR0 and HICR1 are initialized to H'00 by a reset and in hardware standby mode.
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