HD64F2149 Datasheet, PDF (782/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Table 25.7 Bus Timing (2) (Advanced Mode)
Condition: V_CC = 2.7 V to 3.6 V, V_CCB = 2.7 V to 5.5 V, V_SS = 0 V, ø = 2 MHz to maximum
operating frequency, T_a = –20 to +75°C
Item
Address delay time
Address setup time
Address hold time
CS delay time (IOS)
AS delay time
RD delay time 1
RD delay time 2
Read data setup time
Read data hold time
Read data access time 1
Read data access time 2
Read data access time 3
Read data access time 4
Read data access time 5
WR delay time 1
WR delay time 2
WR pulse width 1
WR pulse width 2
Write data delay time
Write data setup time
Write data hold time
WAIT setup time
WAIT hold time
Condition C
10 MHz
Symbol Min
Max
Unit Test Conditions
t _AD
t _AS
t _AH
t _CSD
t _ASD
t _RSD1
t _RSD2
t _RDS
t _RDH
t _ACC1
t _ACC2
t _ACC3
t _ACC4
t _ACC5
t _WRD1
t _WRD2
t _WSW1
t _WSW2
t _WDD
t _WDS
t _WDH
t _WTS
t _WTH
—
60
ns
0.5 × t_cyc – 30 —
ns
0.5 × t_cyc – 20 —
ns
—
60
ns
—
60
ns
—
60
ns
—
60
ns
35
—
ns
0
—
ns
—
1.0 × t_cyc – 80 ns
—
1.5 × t_cyc – 50 ns
—
2.0 × t_cyc – 80 ns
—
2.5 × t_cyc – 50 ns
—
3.0 × t_cyc – 80 ns
—
60
ns
—
60
ns
1.0 × t_cyc – 40 —
ns
1.5 × t_cyc – 40 —
ns
—
60
ns
0
—
ns
20
—
ns
60
—
ns
10
—
ns
Figure 25.9 to
figure 25.13
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